Blueprint · circuit executor
Qwen3.6-35B-A3B-FP8
qwen3.6-35b-a3b-fp8-bf16head on NVIDIA H100 SXM5 80GB
MoE hybrid: 3 GatedDeltaNet layers then 1 gated full-attention layer, 256-expert top-8 MoE with a shared expert, MTP draft head
.kbp exists for a preview.
- Hardware
- H100-SXMNVIDIA H100 SXM5 80GB · sm_90a
- Layers
- 4010 full attention / 30 linear attention
- Kernels
- 2014 modules · 16 families
- Decode step
- 573launches · 575 kernel groups
- Graph
- 944nodes · 1,363 edges
- Context
- 32kmax sequence length
Architecture
Plan arm decode n=1 · digest 31d4c6b3314d · 4 templates over 40 layers. Drag to orbit (pan in 2D); zoom with the wheel, a pinch or the zoom buttons; select a node for its kernel and numerics.
The interactive 3D view needs JavaScript; the layer sequence and its templates are below.
Templates and layer sequence
| Template | Blocks | Nodes | Edges | Fused groups | Used by |
|---|---|---|---|---|---|
embed | embed | 1 | 0 | 0 | once |
attn+moe_ffn | attn + moe_ffn | 25 | 35 | 4 | 10 layers |
gdn+moe_ffn | gdn + moe_ffn | 23 | 31 | 6 | 30 layers |
head | head | 3 | 2 | 0 | once |
Kernels
20 entries in 14 modules, 16 kernel families (0 outside any family). The decode step launches 573 kernels in 573 device groups, plus 2 on the host.
| Kernel (module::func) | Family | Compute unit | Groups |
|---|---|---|---|
causal_conv1d::causal_conv1d_update_l2norm_f32 | causal_conv1d_l2norm | cuda_core | 30 |
gated_delta_rule::gated_delta_rule_decode_f32 | gdn_recurrence | cuda_core | 30 |
gemv::dense_gemv_bf16 | dense_bf16 | cuda_core | 41 |
moe_expert_gemv::moe_weighted_sum_blend | moe_blend | cuda_core | 40 |
moe_shared_expert_fused_fp8::moe_expert_gate_up_shared_fp8 | moe_fp8_1row | cuda_core | 40 |
moe_shared_expert_fused_fp8::moe_expert_silu_down_shared_fp8 | moe_fp8_1row | cuda_core | 40 |
moe_topk::moe_topk_softmax | moe_topk | memory | 40 |
norm::gated_rms_norm_f32_input | gated_rms_norm | memory | 30 |
norm::residual_add_rms_norm | rms_norm | memory | 40 |
norm::rms_norm | rms_norm | memory | 21 |
norm::rms_norm_residual | rms_norm | memory | 1 |
paged_decode::paged_decode_attn | paged_decode_attn | cuda_core | 10 |
reshape_and_cache::reshape_and_cache_flash | kv_write | memory | 10 |
residual_add::bf16_residual_add | residual_add | memory | 1 |
residual_add::sigmoid_gate_mul | sigmoid_gate_mul | memory | 10 |
residual_add_rms_norm_exact::residual_add_rms_norm_exact | rms_norm | memory | 39 |
rope_mrope_interleaved::rope_forward_mrope_interleaved | rope | memory | 10 |
ssm_preprocess::deinterleave_qg | deinterleave_qg | memory | 10 |
ssm_preprocess::dense_gemv_ba_gates | gdn_ba_gates_gemv | cuda_core | 30 |
w8a16_gemm_pipelined_m32::w8a16_gemm_pipelined_m32 | w8a16_gemm | tensor_core:mma.sync.m16n8k16.bf16 | 100 |
Precision
Tier recipe, table qwen3.6-35b-a3b-fp8-bf16head (fc94e079613a). KV cache bf16. Formats are the plan's: weight as stored, activation as the kernel reads it.
Weighted nodes
| Weight | Activation | Nodes |
|---|---|---|
fp8/block128x128 | bf16 | 180 |
bf16 | bf16 | 111 |
fp8/block128x128 | f32 | 80 |
Node outputs
| Output format | Nodes |
|---|---|
bf16 | 573 |
f32 | 240 |
f32,i32 | 40 |
f32,f32 | 30 |
bf16,bf16 | 20 |
i32 | 1 |
Plan arms
Every (mode, rows) arm the instance lists, fused by the planner; a loader with the same rule set re-plans each one and must reproduce its digest.
| Mode | Rows | Groups | Launches | Fused edges | Materialized | Digest |
|---|---|---|---|---|---|---|
decode | 1 | 575 | 573 | 180 | 814 | 31d4c6b3314d |
multi_seq | 2 | 575 | 613 | 180 | 814 | a29c0dfd865eroute gdn_state_slots_fragmented: 575 groups, 256cbe7bdc6e |
multi_seq | 4 | 575 | 613 | 180 | 814 | a471c952c48aroute gdn_state_slots_fragmented: 575 groups, dad4dfe90213 |
multi_seq | 8 | 575 | 613 | 180 | 814 | 388f30e4e6d4route gdn_state_slots_fragmented: 575 groups, 8334507bd9ee |
multi_seq | 12 | 575 | 613 | 180 | 814 | 66f7eedd68acroute gdn_state_slots_fragmented: 575 groups, 3bcba6625bfe |
multi_seq | 16 | 575 | 613 | 180 | 814 | ef971a265d6froute gdn_state_slots_fragmented: 575 groups, 30b65b151417 |
multi_seq | 24 | 575 | 613 | 180 | 814 | 9c497e847765route gdn_state_slots_fragmented: 575 groups, 2f32ed2c7b13 |
multi_seq | 32 | 575 | 613 | 180 | 814 | 0cf4c37f9933route gdn_state_slots_fragmented: 575 groups, c989b677cf24 |
multi_seq | 48 | 575 | 613 | 180 | 814 | 0e7022d3fa53route gdn_state_slots_fragmented: 575 groups, 91fdb893da8c |
multi_seq | 64 | 575 | 613 | 180 | 814 | 29a91e56ef7droute gdn_state_slots_fragmented: 575 groups, d391f1718b7e |
multi_seq | 96 | 415 | 1,013 | 460 | 534 | f832ef5c75b9route gdn_state_slots_fragmented: 415 groups, 9ec7a71ce145 |
multi_seq | 128 | 415 | 1,013 | 460 | 534 | d55817abdc1froute gdn_state_slots_fragmented: 415 groups, c1fc51a03bc6 |
verify | 2 | 575 | 645 | 180 | 814 | e1078f8739ef |
verify | 3 | 575 | 676 | 180 | 814 | 76e1d4fda442 |
verify | 4 | 575 | 707 | 180 | 814 | 0e62ec870943 |
draft | 1 | 27 | 26 | 3 | 33 | fc0943bc31fa |
Performance
No measured record attached
A number appears here only with the fingerprint of the record it comes from. No benchmark record for this blueprint's serve is in the store yet.
Signature and sizes
Unverified
This is a preview: no blueprint body has been built or signed, so there is nothing to verify. Its id is a preview: hash of the slug and the plan digest, never a body hash.
- Suite
mldsa65+ed25519(ML-DSA-65 and Ed25519; both must verify)- Key id
- none
- Trust anchor
- none
- Blueprint id
3ed27b1d0896- Lineage
7063eae2d813· revision 0
- Body
- not built
- Lite file
- not built
- Full file
- not built
- Download
- No .kbp file exists for a preview: blueprint builds and signing are not available yet.
Provenance
Exported by preview: tools/preview/kbp_preview.py over `met circuit plan` (not `met blueprint export`). Engine tree c5b9a80e635d, planner binary f4735654ee1d (built from c5b9a80e635d). Target hopper/qwen3.6-35b-a3b/nvfp4.
Planner settings
activation_quantization=adaptivedecode_split_silu=ongemv_sw=onkv_cache_dtype=bf16lm_head_dtype=bf16rms_norm_act_quant=offrow_tiers=canonicalssm_ba_gates_hopper=onssm_batched_recurrent=onssm_h_dtype=f32w4a16_tc=on
The 16 planner commands
met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode decode --rows 1met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 2met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 4met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 8met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 12met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 16met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 24met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 32met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 48met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 64met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 96met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode multi_seq --rows 128met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode verify --rows 2met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode verify --rows 3met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode verify --rows 4met circuit plan --root <tree> --checkpoint qwen3.6/qwen3.6-35b-a3b-fp8-bf16head --hardware h100-sxm --precision recipe --format plan --mode draft --rows 1
The 8 engine files read, with their SHA-256
| File | SHA-256 |
|---|---|
kernels/circuits/INSTANCES.toml | 31418b33cf20 |
recipes/qwen3.6/qwen3.6-35b-a3b-fp8-bf16head.yaml | fdc559439b85 |
kernels/hopper/HARDWARE.toml | 5b07571d17aa |
kernels/DEVICES.toml | 256d85840f0e |
kernels/circuits/qwen3_6_moe.toml | 41ef9de162e4 |
kernels/circuits/blocks/qwen3_hybrid.toml | cfe66fc69723 |
kernels/gb10/common/KERNEL_FAMILIES.toml | 4b8e793753ee |
kernels/circuits/precision/qwen3.6-35b-a3b-fp8-bf16head.toml | fc94e079613a |
The documents themselves: card.json (kbp-card/v1) and graph.json (kbp-graph/v1).