Blueprint · legacy engine glm5_next

GLM-5.3-Flash-NVFP4

glm-5.3-flash-nvfp4-tp3-512k on NVIDIA GB10 (DGX Spark)

GLM-5 hybrid: KDA and DSA sparse latent attention under 4-stream hyper-connections, dense SwiGLU then 288-expert MoE, MTP draft head

Preview — unsigned Coming soon: no signed .kbp exists for a preview.

Hardware: GB10 ×3NVIDIA GB10 (DGX Spark) · sm_121f
Layers: 4511 sparse attention (DSA) / 34 linear attention
Kernels: 3422 modules · 20 families
Decode step: 1,411launches · 1,299 kernel groups
Graph: 1,740nodes · 2,504 edges
Context: 512kmax sequence length

Architecture

Plan arm decode n=1 · digest 1ff131e588e3 · 5 templates over 45 layers. Drag to orbit (pan in 2D); zoom with the wheel, a pinch or the zoom buttons; select a node for its kernel and numerics.

The interactive 3D view needs JavaScript; the layer sequence and its templates are below.

Loading the architecture…

Find a node

Templates and layer sequence

Layer templates
Template	Blocks	Nodes	Edges	Fused groups	Used by
`embed`	`embed`	2	1	0	once
`dsa+moe`	`dsa` + `moe`	39	51	8	11 layers
`kda+mlp`	`kda` + `mlp`	32	43	4	3 layers
`kda+moe`	`kda` + `moe`	39	54	7	31 layers
`head`	`head`	4	3	0	once

Kernels

34 entries in 22 modules, 20 kernel families (0 outside any family). The decode step launches 1,411 kernels in 1213 device groups, plus 2 on the host.

84 kernel groups of this plan have no kernel on this hardware class (novel): the planner found no fusion rule for them. A legacy engine runs those nodes through its own layer code, which the plan does not describe.

Kernels the plan launches
Kernel (module::func)	Family	Compute unit	Groups
`causal_conv1d::causal_conv1d_update_l2norm`	`causal_conv1d_l2norm`	`cuda_core`	34
`dsa_indexer::dsa_indexer_store`	`dsa_indexer`	`cuda_core`	11
`dsa_indexer_rows::dsa_expand_selection_rows`	`dsa_indexer`	`cuda_core`	11
`dsa_scores_warp::dsa_index_scores_heads_paged`	`dsa_indexer`	`cuda_core`	11
`dsa_scores_warp::dsa_pool_keys_store_rows`	`dsa_indexer`	`cuda_core`	11
`dsa_topk_mc::dsa_topk_mc_collect`	`dsa_indexer`	`cuda_core`	11
`dsa_topk_mc::dsa_topk_mc_pass`	`dsa_indexer`	`cuda_core`	11
`gemv::dense_gemv_bf16`	`dense_bf16`	`cuda_core`	12
`gemv::dense_gemv_bf16_fp32out`	`dense_bf16`	`cuda_core`	64
`glm5next_dsa_mla_decode::glm5next_dsa_mla_decode_fp8`	`glm_mla_decode`	`cuda_core`	11
`glm5next_ffn::glm5next_moe_combine`	`glm_moe_combine`	`memory`	42
`glm5next_ffn::glm5next_router_topk_rank`	`glm_router_topk`	`memory`	42
`glm5next_ffn::glm5next_swiglu_clamp`	`glm_swiglu_clamp`	`memory`	87
`glm5next_mhc::glm5next_hc_expand`	`glm_mhc`	`memory`	1
`glm5next_mhc::glm5next_hc_head`	`glm_mhc`	`memory`	1
`glm5next_mhc::glm5next_hc_post`	`glm_mhc`	`memory`	90
`glm5next_mhc_c1::glm5next_hc_pre_norm_c1`	`glm_mhc`	`cuda_core`	90
`glm5next_mla_latent_write::glm5next_mla_latent_write_fp8`	`glm_mla_latent_write`	`memory`	11
`kda_gate::kda_gate_bf16`	`kda_gates`	`memory`	34
`kda_layer_ops::kda_o_norm_gated_bf16`	`kda_o_norm`	`memory`	34
`kda_layer_ops::kda_pack_qkv_bf16`	`kda_pack`	`memory`	34
`kda_layer_ops::kda_sigmoid_bf16_f32`	`kda_gates`	`memory`	34
`kda_recurrent::kda_recurrent_decode_bf16_smem`	`kda_recurrent`	`cuda_core`	34
`nllb_encoder::nllb_layernorm_bf16`	`layer_norm`	`memory`	11
`norm::rms_norm`	`rms_norm`	`memory`	1
`rms_norm_vanilla::rms_norm_vanilla`	`rms_norm`	`memory`	11
`w4a16_gemv::w4a16_gemv`	`w4a16_gemv`	`cuda_core`	238
`w4a4_gemv_mx::w4a4_gemv_mx8`	`w4a4_mx`	`tensor_core:mma.sync.m16n8k64.mxf4nvf4.block_scale`	6
`w4a4_gemv_mx::w4a4_quant_rows`	`w4a4_mx`	`memory`	6
`w4a4_gemv_mx_moe::w4a4_gemv_mx8_moe_slots_sweep_cs`	`w4a4_mx_static`	`tensor_core:mma.sync.m16n8k64.mxf4nvf4.block_scale`	84
`w4a4_gemv_mx_moe::w4a4_quant_rows_static`	`w4a4_mx_static`	`tensor_core:mma.sync.m16n8k64.mxf4nvf4.block_scale`	84
`w8a8_act_quant::w8a8_act_quant_row`	`w8a8_act_quant`	`memory`	101
`w8a8_gemv::w8a8_gemv_rowscale_mb1_ku8`	`wxay`	`tensor_core:mma.sync.m16n8k32.e4m3`	101
`w8a8_gemv::w8a8_gemv_rowscale_mb1_ku8_split4`	`wxay`	`tensor_core:mma.sync.m16n8k32.e4m3`	11

Precision

Tier recipe, table glm-5.3-flash-nvfp4-tp3 (f1e299043e34). KV cache fp8. Formats are the plan's: weight as stored, activation as the kernel reads it.

Weighted nodes

Weight and activation formats of the weighted nodes
Weight	Activation	Nodes
`nvfp4/g16`	`bf16`	322
`fp8/channel`	`fp8/token`	123
`bf16`	`f32`	90
`nvfp4/g16`	`nvfp4/g16`	90
`bf16`	`bf16`	87

Node outputs

Output formats of every node
Output format	Nodes
`bf16`	904
`f32`	411
`fp8/token`	101
`bf16,f32,f32`	90
`nvfp4/g16`	90
`f32,i32`	42
`f32,f32`	34
`i32`	12

Plan arms

Every (mode, rows) arm the instance lists, fused by the planner; a loader with the same rule set re-plans each one and must reproduce its digest.

Plan arms
Mode	Rows	Groups	Launches	Fused edges	Materialized	Digest
`decode`	1	1,299	1,411	396	1,544	`1ff131e588e3`
`multi_seq`	2	1,162	1,790	522	1,418	`6901b4656aca`
`multi_seq`	4	1,162	2,212	522	1,418	`97f9f6bb5b99`
`multi_seq`	8	1,162	3,056	522	1,418	`b7345097c703`
`multi_seq`	12	1,184	3,922	522	1,418	`c30a839202eb`
`multi_seq`	16	1,184	4,766	522	1,418	`c39ed89d8b0f`
`multi_seq`	24	1,672	295	34	1,906	`d242da1f6372`route `gdn_state_slots_fragmented`: 1672 groups, `f2d841d37452`
`multi_seq`	32	1,672	295	34	1,906	`415a2b942fc2`route `gdn_state_slots_fragmented`: 1672 groups, `501954598eb5`
`multi_seq`	48	1,672	196	34	1,906	`5ed8f0301f4e`route `gdn_state_slots_fragmented`: 1672 groups, `0466e915dcab`
`multi_seq`	64	1,672	196	34	1,906	`ae9c63121d47`route `gdn_state_slots_fragmented`: 1672 groups, `b1a28ab12a54`
`multi_seq`	96	1,672	196	34	1,906	`e908fdfdccb6`route `gdn_state_slots_fragmented`: 1672 groups, `e90a27d394bf`
`multi_seq`	128	1,672	196	34	1,906	`2a6b51a59e1f`route `gdn_state_slots_fragmented`: 1672 groups, `30d2adaf1482`
`verify`	2	1,173	1,836	522	1,418	`5d2226cbcbc1`
`verify`	3	1,173	2,081	522	1,418	`3446f07c8c41`
`verify`	4	1,173	2,326	522	1,418	`063961fa91fb`
`verify`	8	1,173	3,298	522	1,418	`3bc1c08e84d2`
`draft`	1	37	12	0	38	`8969b4c107e7`

Performance

Serve throughput

Measured serve throughput with fingerprints
Measure	Value	Runs	Status	Conditions and source	Fingerprint
C=1 decode, 1k context	50.52 tok/s	50.12 · 50.52 · 50.8	preliminary	median of runs p1-p3 (recipe defaults); single harness, bring-up ctxsweep, C=1, OSL 512 profile glm53-tp3-512k-fast12/PROVENANCE.txt	record`9e928d609746`git`6d845c0ee`binary`377d5214f286`argv`e17fe83b2704`env`07768e9f8fd7`
C=1 decode, 16k context	49.43 tok/s	49.07 · 49.43 · 49.52	preliminary	median of runs p1-p3 (recipe defaults); single harness, bring-up ctxsweep, C=1, OSL 512 profile glm53-tp3-512k-fast12/PROVENANCE.txt	record`9e928d609746`git`6d845c0ee`binary`377d5214f286`argv`e17fe83b2704`env`07768e9f8fd7`
C=1 decode, 64k context	47.96 tok/s	47.7 · 47.96 · 48.11	preliminary	median of runs p1-p3 (recipe defaults); single harness, bring-up ctxsweep, C=1, OSL 512 profile glm53-tp3-512k-fast12/PROVENANCE.txt	record`9e928d609746`git`6d845c0ee`binary`377d5214f286`argv`e17fe83b2704`env`07768e9f8fd7`
C=1 decode, 128k context	47.96 tok/s	47.67 · 47.96 · 47.98	preliminary	median of runs p1-p3 (recipe defaults); single harness, bring-up ctxsweep, C=1, OSL 512; runs p2 and p3 at 128k are throttle-flagged in the record profile glm53-tp3-512k-fast12/PROVENANCE.txt	record`9e928d609746`git`6d845c0ee`binary`377d5214f286`argv`e17fe83b2704`env`07768e9f8fd7`

Kernel measurements

62 per-kernel times (nsys, against the roofline floor): 22 for kernels this plan launches, 40 for kernels outside it. Open the kernel measurements

Signature and sizes

Unverified

This is a preview: no blueprint body has been built or signed, so there is nothing to verify. Its id is a preview: hash of the slug and the plan digest, never a body hash.

Suite: mldsa65+ed25519 (ML-DSA-65 and Ed25519; both must verify)
Key id: none
Trust anchor: none
Blueprint id: b707d03d56bb
Lineage: 2ed80c3cc566 · revision 0

Body: not built
Lite file: not built
Full file: not built
Download: No .kbp file exists for a preview: blueprint builds and signing are not available yet.

Provenance

Exported by preview: tools/preview/kbp_preview.py over `met circuit plan` (not `met blueprint export`). Engine tree 7f7fb57fc971, planner binary f4735654ee1d (built from c5b9a80e635d). Target gb10/glm-5.3-flash/nvfp4.

Planner settings

activation_quantization=adaptivedecode_split_silu=ongemv_sw=onglm_mhc_fused=onglm_moe_expert_layout=tpglm_moe_w4a4_grouped=onglm_router_rows=onglm_router_topk_rank=onkv_cache_dtype=fp8lm_head_dtype=bf16rms_norm_act_quant=offrow_tiers=by_rowsssm_ba_gates_hopper=onssm_batched_recurrent=onssm_h_dtype=f32w4a16_tc=on

The 17 planner commands

met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode decode --rows 1
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 2
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 4
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 8
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 12
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 16
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 24
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 32
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 48
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 64
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 96
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode multi_seq --rows 128
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode verify --rows 2
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode verify --rows 3
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode verify --rows 4
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode verify --rows 8
met circuit plan --root <tree> --checkpoint glm-5.3/glm-5.3-flash-nvfp4-tp3-512k --hardware gb10 --precision recipe --format plan --mode draft --rows 1

The 10 engine files read, with their SHA-256

Engine files read
File	SHA-256
`kernels/circuits/INSTANCES.toml`	`126b177aa899`
`recipes/glm-5.3/glm-5.3-flash-nvfp4-tp3-512k.yaml`	`6e639ddb73e5`
`kernels/gb10/HARDWARE.toml`	`8a787d560510`
`kernels/DEVICES.toml`	`256d85840f0e`
`kernels/circuits/glm5_next.toml`	`047893d2422d`
`kernels/circuits/blocks/glm5_next_kda.toml`	`9486bdea4533`
`kernels/circuits/blocks/glm5_next_dsa.toml`	`fdb3145558a6`
`kernels/circuits/blocks/glm5_next_ffn.toml`	`4738cd396a11`
`kernels/gb10/common/KERNEL_FAMILIES.toml`	`70c24b8b4764`
`kernels/circuits/precision/glm-5.3-flash-nvfp4-tp3.toml`	`f1e299043e34`

The documents themselves: card.json (kbp-card/v1) and graph.json (kbp-graph/v1).